ODETTE Project Going to its Last Phase

Authors:
OFFIS
Eike Grimpe, Tiemo Fandrey, Bernd Timmermann

Objectives
The spread of embedded systems comprising hardware and software components has been on the rise for quite a while and is still increasing. Today they have an impact on our daily lives in many areas from our workplace to our leisure time. The requirements for these systems are steadily growing, along with their complexity. However, today's technology based on circuits providing several hundred million transistors on a single chip is able to meet most of these requirements. The problem is that the state of the art hardware design methods cannot keep pace with the rapid advance of technological development, i.e. the frequently mentioned design gap is becoming increasingly wider.

During the three years project ODETTE which is being financed by the European Commission as part of the IST framework programme 5, methods for describing systems, and especially hardware, are to be raised to a new level. As we have learned from software development, the introduction of object-oriented development methods provides a very promising way of getting to grips with complex systems. Object-oriented features such as classes, inheritance and polymorphism are powerful modelling techniques, but applying them to hardware design raises many questions. The ODETTE project, started in June 2000, is taking on the challenge to tackle these issues. In order to bring object-orientation into hardware design several objectives have had to be met; first of all an object-oriented hardware description language has had to be developed. Its object-oriented constructs must fit synthesis requirements, i.e. must be automatically translatable into behavioural equivalent and efficient code, being synthesisable with existing synthesis tools.

Accompanying the language development, concepts for synthesis of object-oriented constructs have had to be developed, too. To permit the shift of the modelling paradigm provided by the new language, supporting design tools are essential. As such tools were not commercially available, supplemental tools for verification, simulation, and synthesis of object-oriented models have had to be developed. In addition to the tool set also class libraries have been developed, which support the use of the new high level object-oriented design language for modelling hardware.

The design of the mentioned object-oriented hardware description language and the development of supporting tools and libraries constitute the work packages of the project. As the usability of the design environment evolving from the project is mandatory, significant effort was scheduled on intense evaluation by the industrial partners within the project. Finally, since the project has lined up with the goal to produce tools and technologies with relevance for the EDA market, some effort was scheduled on dissemination and promotion activities.

Consortium
The consortium was carefully assembled to be able to meet the targeted results: Synopsys as one of the major global players in EDA is the ideal partner for developing language front-end and simulation tools and technology. The research institute OFFIS has already successfully worked on object-oriented extensions for VHDL and is primarily designing the SystemC-based object-oriented hardware description language SystemC-Plus as well as the synthesis technology. The IBM Haifa Research Lab is contributing to the tool suite with their expertise in verification technology.

With Robert Bosch GmbH, and Siemens Mobile Communications the European automotive and mobile communications industry is excellently represented. As industrial partners they bring valuable design experience into the consortium and are perfect companions for evaluating the new design environment. The promotion of the project results and all standardisation activities concerning the developed SystemC extensions is done by ECSI, being able to make use of its excellent network of contacts throughout Europe.

The First Two Years
Since its beginning the project has had to face several challenges and changes. These challenges and changes have not only been of technical nature but also of administrative nature. The consortium was not only able to master all the changes and to successfully continue its work, but it was even able to take the given chances for redirecting the project to improve its overall quality.

The change with the most serious impact on the technical work in the project was a shift of the input description language from Objective VHDL, an object-oriented extension of VHDL, towards SystemC. While Objective VHDL had already been developed with explicit regard to synthesisabilty, now there was the need to adapt and extend SystemC accordingly within the first months of the project. This phase led to a new SystemC based object-oriented hardware description language, or more precisely a new SystemC/C++ synthesis subset, called SystemC-Plus, laying the foundation for the rest of the project. With regard to hardware synthesis, SystemC-Plus of course specifies some restrictions on the use of C++, like forbidding dynamic memory allocation and de-allocation, but the benefits of the object oriented approach make this up. Classes and objects can be used as well as the related concepts inheritance, class templates, polymorphism and even a high level inter-process communication based on a special kind of shared objects, similar to channels but with a clear synthesis semantics.

One major activity of the past year of the project was the development of the SystemC-Plus synthesis tool. Synthesis means here high level synthesis on top of existing tools like the CoCentric® SystemC Compiler, which is still necessary to perform behavioural and logic synthesis. A promising and flexible software architecture for the tool was found, allowing to make fast implementation progress and allowing to come to an actual prototype that nearly supports all object-oriented features for synthesis that have been promised in the work-plan. The chosen tool architecture is also promising for the future and should allow an easy integration of additional synthesis features and improvements.

Also the first results from IBM dealing with new verification technologies make good impression and promise to really improve the verification process based on object-oriented methodologies. Apart from the direct technical work, there have been several promotion activities during the project. Partners of ODETTE participated in past Forum on Design Languages (FDL) conferences with talks about the attributes of the tool-suite and the features of SystemC-Plus. In September 2002 there was even a special session on ODETTE. Also a demonstration of a very early prototype of the SystemC-Plus synthesis tool was given to interested visitors of the FDL.

At the Information Technology Society (IST) conference in Copenhagen in November 2002 the ODETTE project partners had a booth showing a demo of the synthesis tool and Synopsys' co-simulation solution. There have also been several publications at different international conferences up to major EDA events like DATE and DAC and even some contributions to new books on system level and SystemC based design.

OFFIS as responsible partner for the management also launched a website presenting the ODETTE project in the World Wide Web. At the address http://odette.offis.de/ the latest non-classified information about the project can be gathered and additionally, everything needed to start modelling with SystemC-Plus (only for simulation, since synthesis technology is still confidential) can be downloaded from that site.

On The Final Lane
The basic technical work in the project is almost done. The SystemC front-end necessary for parsing and analysing a SystemC description for further processing - synthesis in this case - as well as a VHDL/SystemC co-simulation solution have nearly reached marketable versions. A first version of the verification environment is also available.

The development of the synthesis tool has just reached a prototypic stage that supports all targeted features.

The actual tool set supports the complete flow from an object-oriented behavioural or RT SystemC-Plus description to a behavioural or RT SystemC description (depending on the entry level) that can be further synthesised to a gate net list by the use of an additional back-end synthesis tool like the Synopsys CoCentric® SystemC Compiler.

In the final phase of the project the design environment will be evaluated by the industrial partners. During the evaluation the tool set will be further improved. The work on the support libraries with general and application specific elements for modelling hardware with SystemC-Plus has almost been finished, so that the libraries can be used for doing the evaluation and therefore can be validated themselves.

A main focus will now lie on the exploitation of the results of the project. But a market-ready synthesis solution requires in particular to spend some more effort on optimisation techniques in order to improve the quality of the generated code in terms of resource efficiency. Also the promotion of the project results will be continued. The ODETTE project will end in May, 2003.

Ultimately the project is expected to provide a basis for shifting the state of hardware design to a higher level of abstraction. This basis has to be worked up and offers a lot of potential for optimisations and extensions which will be addressed in the remaining time of the project and even beyond it.